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Indian Institute of Information Technology, Design and Manufacturing,
(IIITD&M) Kancheepuram, Chennai - 600 127
(An Institute of National Importance Fully Funded by Govt of India)
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Dr. Swathi Tanjore Gurumani
Visiting Faculty of Computer Science
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| P. G : Master of Science in Computer Engineering, University of Alabama in Huntsville, USA |
| PhD : Ph. D. in Computer Engineering, University of Alabama in Huntsville, USA |
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| Email : gurumanis@iiitdm.ac.in Phone : +91-44-27476374 |
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Research Interests
- Reconfigurable Computing
- hardware/software co-design
- high-level synthesis
Teaching
- MicroProcessors and Computer Organization (July – Dec 2016)
- Piazza class webpage: https://piazza.com/iiitdm.ac.in/fall2016/ele315t/home
Honors and Awards
- Awarded “Outstanding Graduate Student of ECE Department”, UAH 2006.
- Invited Member of Phi Kappa Phi – National academic honor society, USA
- Invited Member of Eta Kappa Nu – Electrical and Computer Engineering National honor society, USA
- Listed in Dean’s List (Graduate School), Academic Year 2003, 2005, University of Alabama in Huntsville.
Employment
- Principal Research Engineer, Advanced Digital Sciences Center, Singapore, July 2012 – June 2016
- Principal Research Affiliate (Adjunct), University of Illinois - Urbana Champaign, October 2012 – June 2016
- Hardware R&D Engineer, Start-up company, New Jersey, Mar 2008 – Sep 2011
- Design Consultant - Intern, Qualcomm Inc., San Diego, Nov 2007 - Feb 2008
- Senior Research Associate, University of Alabama Huntsville, Spring 2004
Journals
- [TCAD'16] Y. Chen, T. Nguyen, Y.Chen, S.T. Gurumani, Y. Liang, K. Rupnow, W.M. Hwu, J. Cong, D. Chen, “FCUDA-HB: Hierarchical and Scalable Bus Architecture Generation on FPGAs with High-Level Synthesis”, IEEE Transactions on Computer Aided Design (TCAD)
- [TVLSI'15] Y. Chen, S.T. Gurumani, K. Rupnow, Y. Liang, G. Li, D. Guo and D. Chen, “FCUDA-NoC: A Scalable and Efficient Network-on-Chip Implementation for the CUDA-to-FPGA Flow”, IEEE Transactions on Very Large Scale Integration Systems, (TVLSI), vol. PP, no. 99, pp 1-14, Dec 2015
- [TCAD'14] Hongbin Zheng, Swathi T. Gurumani, Liwei Yang, Deming Chen, Kyle Rupnow, "High Level Synthesis with Behavioral Level Multi-Cycle Path Analysis”, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, vol.33, no.12, pp.1832,1845, Dec. 2014
- [D&T'09] Sumit Ahuja, Swathi T. Gurumani, Chad Spackman, Sandeep K. Shukla, “Hardware Coprocessor Synthesis from an ANSI C Specification”, IEEE Design and Test of Computers, Vol. 26, No. 4, Special Issue on High-Level Synthesis, 2009.
Conferences
- [FCCM'16] Liwei Yang, Swathi Gurumani, Deming Chen, Kyle Rupnow, "AutoSLIDE: Automatic Source-Level Instrumentation and Debugging for HLS", IEEE International Symposium on Field-Programmable Custom Computing Machines (FCCM 2016).
- [DATE'16] M. Satria, S.Gurumani, W. Zhang, K.P. Tee, A. Koh, P. Yu, K. Rupnow, D. Chen, "Real-Time System-Level Implementation of a Telepresence Robot Using an Embedded GPU Platform", Design Automation and Test in Europe (DATE 2016)
- [FPGA'16] Tan Nguyen, Swathi Gurumani, Deming Chen, Kyle Rupnow, "Platform Integration of CUDA-to-RTL High Level Synthesis", IEEE/ACM International Conference on Field Programmable Gate Arrays (FPGA 2016)
- [DAC'16] Keith Campbell, Leon He, Liwei Yang, Swathi Gurumani, Kyle Rupnow, Deming Chen, "Debugging and Verifying SoC Designs through Effective Cross Layer Hardware-Software Co-Simulation", in Design Automation Conference (DAC 2016).
- [FPGA'16] Xinheng Liu, Yao Chen, Tan Nguyen, Swathi Gurumani, Kyle Rupnow, Deming Chen, "High-Level Synthesis of Complex Applications: An H.264 Video Decoder", IEEE/ACM International Conference on Field Programmable Gate Arrays (FPGA 2016)
- Invited Paper – [ISVLSI’16] T. Nguyen, Y. Chen, K. Rupnow, S. Gurumani, and D. Chen, "SoC, NoC and Hierarchical Bus Implementations of Applications on FPGAs Using the FCUDA Flow", Proceedings of IEEE Computer Society Annual Symposium on VLSI, July 2016
- Invited Paper - [ASPDAC'16] Zelei Sun, Keith Campbell, Wei Zuo, Kyle Rupnow, Swathi Gurumani, Frederic Doucet, Deming Chen, "Designing High-Quality Hardware on a development Effort Budget: A Study of the Current State of High-Level Synthesis", Asia South-Pacific Design Automation Conference (ASPDAC 2016)
- [FPT'15] L. Yang, S. Gurumani, D. Chen, K. Rupnow, “Behavioral-Level IP Integration in High-Level Synthesis”, IEEE International Conference on Field-Programmable Technology (FPT 2015).
- [FPT'15] L. Yang, M. Ikram, S. Gurumani, S. Fahmy, D. Chen, K. Rupnow, “JIT Trace-Based Verification for High-Level Synthesis”, IEEE International Conference on Field-Programmable Technology (FPT 2015).
- Invited Paper - [ASICON'15] L. Yang, Y. Chen, W. Zuo, T. Nguyen, S. Gurumani, K. Rupnow, D. Chen, “System-Level Design Solutions: Enabling the IoT Explosion”, submitted to International Conference on ASIC (ASICON 2015)
- Invited Paper - [ISIC'14] Wei Zuo, Hongbin Zheng, Swathi Gurumani, Kyle Rupnow, Deming Chen, "New solutions for system-level and high-level synthesis," Integrated Circuits (ISIC), 2014 14th International Symposium on , vol., no., pp.71,74, 10-12 Dec. 2014
- [FCCM'14] Swathi T. Gurumani, Jacob Tolar, Yao Chen, Eric Liang, Kyle Rupnow, Deming Chen, “Integrated CUDA-to-FPGA Synthesis with Network-on-Chip", Proceedings of the 2014 IEEE International Symposium on Field-programmable Custom Computing Machines, Boston, USA, May 2014.
- [FPGA'14] Hongbin Zheng, Swathi T. Gurumani, Kyle Rupnow, Deming Chen, “Fast and effective placement and routing directed high-level synthesis for FPGAs”, Proceedings of the 2014 ACM/SIGDA International symposium in Field-Programmable Gate Arrays, pp 1-10, Monterey, California, USA, Feb 2014.
- [FPL'13] Hongbin Zheng, Swathi T. Gurumani, Liwei Yang, Deming Chen, Kyle Rupnow, “High Level Synthesis with Behavioral Level Multi-Cycle Path Analysis”, In proceedings of 23rd International Conference On Field Programmable Logic And Applications, FPL 2013.
- Invited Paper - [ASPDAC'13] S. Gurumani, K. Rupnow, Y. Liang, H. Cholakkai, and D. Chen, "High Level Synthesis of Multiple Dependent CUDA Kernels for FPGAs," Proceedings of IEEE/ACM Asia and South Pacific Design Automation Conference, January 2013
- [ERSA'07] Swathi Tanjore Gurumani, Earl Wells, “Energy-Efficient Dynamic Task Scheduling Algorithm for Reconfigurable System-on-Chip Architectures”, Proceedings of International conference on Engineering of Reconfigurable Systems and Algorithms, ERSA, Las Vegas, June 2007.
- [ESA'07] Swathi Tanjore Gurumani, Earl Wells, “Dynamic Power Management in Power-Aware Reconfigurable System-on-Chip Architectures”, Proceedings of International conference on Embedded Systems and Applications, Las Vegas, June 2007.
- [PDCS'04] Swathi Tanjore Gurumani, Mathew M. Noel, Earl Wells, Thomas Jannett, “Performance Analysis of Coarse-Grained Parallel Particle Swarm Optimization”, Proceedings of 19th International Conference on Parallel and Distributed Computing Systems, San Francisco, September 2006.
- [ACMSE'04] Swathi Tanjore Gurumani, Alexander Milenkovic, “Execution Characteristics of SPEC CPU2000 Benchmarks: Intel C++ vs. Microsoft VC++”, Proceedings of 42nd Annual ACM Southeast Conference, Huntsville–AL, April 2004.
- [PDCS'03] Zexin Pan, Srikanth Venkateswaran, Swathi Tanjore Gurumani, Earl Wells, “Exploiting Fin-Grain Parallelism of IDEA Using Xilinx FPGA”, Proceedings of 16th International Conference on Parallel and Distributed Computing Systems, Reno-NV, August 2003.
Workshops and Posters
- [FPGA’16] Liwei Yang, Swathi Gurumani, Suhaib A Fahmy, Deming Chen, Kyle Rupnow, “Automated Verification Code Generation in HLS Using Software Execution Traces”, in IEEE/ACM International Conference on Field Programmable Gate Arrays, California, USA.
- [SCAW’16] Deming Chen, Jason Cong, Swathi Gurumani, Wen-mei Hwu, Kyle Rupnow, Zhiru Zhang, “System Synthesis and Automated Verification: Design Demands for IoT Devices”, in Sensor to Cloud Architecture Workshops (SCAW), Barcelona, Spain
